DS1820 Checker
DS1820 Checker circuit
DS1820 Checker circuit
The content of first byte from scratchpad of the DS1820 temperature sensor it's displayed to portb on LEDs. LSB bit it is for the half grad.
Source code file for DS1820 Checker is available for download .;=====ds1820 temp check / Version 1.0======21/10/03== ; ra0 sdata ; rb0 to rb7 led outputs ; internal clock ; standard crystal 4.915 MHz XT - .8138us pe instructiune ; Program realizat de Ing. Bergthaller Iulian-Alexandru ;------------------------------------------------------------ list p=16f84A;f=inhx8m _CP_OFF equ H'3FFF' ;code protect off _PWRTE_ON equ H'3FFF' ;Power on timer on _WDT_OFF equ H'3FFB' ;watch dog timer off _XT_OSC equ H'3FFD' ;crystal oscillator __CONFIG _CP_OFF & _PWRTE_ON & _WDT_OFF & _XT_OSC ;------------------------------------------------------------ ; cpu init status equ 03 porta equ 05 portb equ 06 count1 equ 0C count2 equ 0D count3 equ 0E ratb equ 0F trisa equ 85 trisb equ 86 #DEFINE sdta porta,0 ;------------------------------------------------------------ ; bit init rp0 equ 5 w equ 0 f equ 1 ;------------------------------------------------------------ org 0 ; ;------------------------------------------------------------ init bsf status,rp0 ;switch to bank 1 movlw 0 ; porta and portb set to outputs movwf trisa movwf trisb bcf status,rp0 ;switch back to bank 0 movlw 0 movwf porta movwf portb ;*************************************************** start movlw 0xFF ; led test movwf portb call haltb ;*************************************************** scrie call rset movlw 0xCC ;skip rom call schtx movlw 0x44 ;convert call schtx call halta call rset movlw 0xCC ;skip rom call schtx movlw 0xBE ;read scratchpad call schtx call schrx goto scrie ;*************************************************** rset bcf sdta call haltb ; 510 us bsf sdta bsf status,rp0 ;switch to bank 1 movlw 1 ; porta set to inputs movwf trisa bcf status,rp0 ;switch back to bank 0 call haltc ; 61 us btfsc sdta bsf portb,0 btfss sdta bcf portb,0 call haltb ; 510us bsf status,rp0 ;switch to bank 1 movlw 0 ; porta set to outputs movwf trisa bcf status,rp0 ;switch back to bank 0 retlw 00 ;*************************************************** schtx movwf ratb ; movlw 0x08 movwf count3 ;*************************************************** gbit btfsc ratb,0 ; data reverse flow call unu btfss ratb,0 call nul rrf ratb,F decfsz count3,F goto gbit retlw 00 ;*************************************************** schrx movlw 0x08 movwf count3 samp rrf ratb,F bcf sdta nop bsf status,rp0 ;switch to bank 1 movlw 1 ; porta set to inputs movwf trisa bcf status,rp0 ;switch back to bank 0 ; 3.2 us call pause btfsc sdta ; data reverse flow bsf ratb,7 btfss sdta bcf ratb,7 call haltc ; 61 us bsf status,rp0 ;switch to bank 1 movlw 0 ; porta set to outputs movwf trisa bcf status,rp0 ;switch back to bank 0 decfsz count3,F goto samp movf ratb,0 movwf portb call halta retlw 00 ;*************************************************** unu bcf sdta call pause ; 11 us bsf sdta call haltc ; 65 us retlw 00 ;*************************************************** nul bcf sdta call pause ; 11 us call haltc ; 65 us bsf sdta retlw 00 ;*************************************************** pause movlw 0x03 ; 9uS movwf count1 d1 decfsz count1,f goto d1 retlw 00 ;*************************************************** halta movlw 0x05 ; cca. 800ms delay movwf count3 r3 movlw 0xFF movwf count1 r1 movlw 0xFF movwf count2 r2 decfsz count2,f goto r2 decfsz count1,f goto r1 decfsz count3,f goto r3 retlw 00 ;*************************************************** haltb movlw 0xD0 ; 510 us movwf count1 w1 decfsz count1,f goto w1 retlw 00 ;*************************************************** haltc movlw 0x19 ; 61 us movwf count1 w2 decfsz count1,f goto w2 retlw 00 ;------------------------------------------------------------ end ;============================================================
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